superiotool: Cosmetics and coding style fixes.

[coreboot.git] / util / superiotool / smsc.c

diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c
index af1dd757f2b9a26428db08280bfa35696174b6dd..820be0871f9b843007c67d7b7a4f6a5e038cee89 100644 (file)
--- a/util/superiotool/smsc.c
+++ b/util/superiotool/smsc.c
@@ -29,6 +29,46 @@
 
 static const struct superio_registers reg_table[] = {
        /* The following Super I/Os use the 0x20/0x21 ID registers. */
+       {0x02, "FDC37C932", {
+               {NOLDN, NULL,
+                       {0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x2d,0x2e,
+                        0x2f,EOT},
+                       {0x00,0x03,0x02,0x01,0x00,0x00,0x04,NANA,NANA,
+                        0x00,EOT}},
+               {0x0, "Floppy",
+                       {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
+                        0xf5,EOT},
+                       {0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
+                        0x00,EOT}},
+               {0x1, "IDE 1",
+                       {0x30,0x60,0x61,0x62,0x63,0x70,EOT},
+                       {0x00,0x01,0xf0,0x03,0xf6,0x0e,EOT}},
+               {0x2, "IDE 2",
+                       {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+               {0x3, "Parallel port",
+                       {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,0x04,0x3c,EOT}},
+               {0x4, "COM1",
+                       {0x30,0x60,0x61,0x70,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,EOT}},
+               {0x5, "COM2",
+                       {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+               {0x6, "Real-time clock (RTC)",
+                       {0x30,0x70,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,NANA,MISC,NANA,NANA,EOT}},
+               {0x7, "Keyboard",
+                       {0x30,0x70,0x72,EOT},
+                       {0x00,0x00,0x00,EOT}},
+               {0x8, "Aux I/O",
+                       {0x30,0x60,0x61,0x62,0x63,0xe0,0xe1,0xe2,0xe3,0xe4,
+                        0xe5,0xe6,0xe7,0xe8,0xe9,0xea,0xeb,0xec,0xed,0xf0,
+                        0xf1,0xf2,0xf3,0xf4,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,
+                        0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00,
+                        0x00,0x00,0x00,MISC,EOT}},
+               {EOT}}},
        {0x03, "FDC37C93xFR", {
                /* FIXME: There's another 0x03 but found on port 0x0d/0x0e! */
                {EOT}}},
@@ -318,6 +358,8 @@ static const struct superio_registers reg_table[] = {
                        {0x30,0x60,0x61,0x70,0xf0,EOT},
                        {0x00,0x00,0x00,NANA,NANA,EOT}},
                {EOT}}},
+#if 0
+       /* FIXME: FDC37M81x and MEC1308 have conflicting device IDs */
        {0x4d, "FDC37M81x", {
                {NOLDN, NULL,
                        {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c,
@@ -350,6 +392,34 @@ static const struct superio_registers reg_table[] = {
                         NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,RSVD,RSVD,
                         RSVD,RSVD,RSVD,RSVD,EOT}},
                {EOT}}},
+#endif
+       {0x4d, "MEC1308", {
+               {NOLDN, NULL,
+                       {0x02,0x03,0x07,0x17,0x20,0x21,0x22,0x23,0x24,0x25,
+                        0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,
+                        EOT},
+                       {0x00,RSVD,0x00,RSVD,0x4d,0x00,0x00,0x00,0x04,0x04,
+                        MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,
+                        EOT}},
+               {0x1, "PM1",
+                       {0x30,0x60,0x61,EOT},
+                       {0x00,0x00,0x00,EOT}},
+               {0x4, "COM1",
+                       {0x30,0x60,0x61,0x70,EOT},
+                       {0x00,0x00,0x00,0x00,EOT}},
+               {0x7, "KBD",
+                       {0x30,0x70,0x72,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,EOT}},
+               {0x8, "EC/ACPI",
+                       {0x30,0x60,0x61,EOT},
+                       {0x00,0x00,0x62,EOT}},
+               {0x9, "Mailbox",
+                       {0x30,0x60,0x61,EOT},
+                       {0x00,0x00,0x00,EOT}},
+               {0x10, "CIRV",
+                       {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf3,0xf4,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+               {EOT}}},
        {0x51, "LPC47B27x", {
                {NOLDN, NULL,
                        {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,