* is expected to be information that cannot be discovered by
* other means, such as quering the hardware directly.
*
- * All of the information should be Position Independent Data.
+ * All of the information should be Position Independent Data.
* That is it should be safe to relocated any of the information
* without it's meaning/correctnes changing. For table that
* can reasonably be used on multiple architectures the data
* table entries and be backwards compatible, but it is not required.
*/
-/* Since coreboot is usually compiled 32bit, gcc will align 64bit
- * types to 32bit boundaries. If the coreboot table is dumped on a
- * 64bit system, a uint64_t would be aligned to 64bit boundaries,
+/* Since coreboot is usually compiled 32bit, gcc will align 64bit
+ * types to 32bit boundaries. If the coreboot table is dumped on a
+ * 64bit system, a uint64_t would be aligned to 64bit boundaries,
* breaking the table format.
*
* lb_uint64 will keep 64bit coreboot table values aligned to 32bit
uint32_t config; /* e=enumeration, h=hex, r=reserved */
uint32_t config_id; /* a number linking to an enumeration record */
#define CMOS_MAX_NAME_LENGTH 32
- uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
+ uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
variable length int aligned */
};
uint32_t config_id; /* a number identifying the config id */
uint32_t value; /* the value associated with the text */
#define CMOS_MAX_TEXT_LENGTH 32
- uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
+ uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
variable length int aligned */
};