Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6
[coreboot.git] / src / vendorcode / amd / cimx / sb800 / AMDSBLIB.h
index 6c92227eda8d0b65f49c95556dac690ffe663673..b2a0a1b75a5e1f1ea8c8907708c638bd2fbc603e 100644 (file)
@@ -43,6 +43,8 @@
  *
  */
 
+#ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
+#define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
 
 //AMDSBLIB Routines
 
@@ -116,3 +118,5 @@ void WriteIo32(IN unsigned short Address, IN unsigned int Data);
 //void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
 void CpuidRead(unsigned int CpuidFcnAddress, CPUID_DATA *Value);
 unsigned char ReadNumberOfCpuCores(void);
+
+#endif