C and other Super I/O cosmetic fixes.

[coreboot.git] / src / superio / nsc / pc87427 / superio.c

diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c
index 82efb3c4ee8721f2e5ca1eedd3e82f892e2fa60c..088fd0aa6f76d13c83dd48183389c7b347bc1aa8 100644 (file)
--- a/src/superio/nsc/pc87427/superio.c
+++ b/src/superio/nsc/pc87427/superio.c
@@ -31,15 +31,12 @@
 
 static void init(device_t dev)
 {
-       struct superio_nsc_pc87427_config *conf;
+       struct superio_nsc_pc87427_config *conf = dev->chip_info;
        struct resource *res0;
-       /* Wishlist handle well known programming interfaces more
-        * generically.
-        */
-       if (!dev->enabled) {
+
+       if (!dev->enabled)
                return;
-       }
-       conf = dev->chip_info;
+
        switch(dev->path.pnp.device) {
        case PC87427_SP1:
                res0 = find_resource(dev, PNP_IDX_IO0);
@@ -64,25 +61,23 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-       { &ops,  PC87427_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
-       { &ops,  PC87427_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops,  PC87427_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops,  PC87427_SWC,  PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0,
-               { 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } },
-       { &ops,  PC87427_KBCM, PNP_IRQ0 },
-       { &ops,  PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
-       { &ops,  PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
-       { &ops,  PC87427_WDT,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
-       { &ops,  PC87427_FMC,  PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
-       { &ops,  PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
-       { &ops,  PC87427_RTC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } },
-       { &ops,  PC87427_MHC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } },
+       { &ops, PC87427_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0}, },
+       { &ops, PC87427_SP2,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+       { &ops, PC87427_SP1,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+       { &ops, PC87427_SWC,  PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, {0xfff0, 0}, {0xfffc, 0}, {0xfffc, 0}, {0xfff8, 0}, },
+       { &ops, PC87427_KBCM, PNP_IRQ0, },
+       { &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
+       { &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+       { &ops, PC87427_WDT,  PNP_IO0 | PNP_IRQ0, {0xfff0, 0}, },
+       { &ops, PC87427_FMC,  PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+       { &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+       { &ops, PC87427_RTC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfffe, 0}, {0xfffe, 0}, },
+       { &ops, PC87427_MHC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xffe0, 0}, {0xffe0, 0}, },
 };
 
 static void enable_dev(struct device *dev)
 {
-       pnp_enable_devices(dev, &ops,
-               ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+       pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 }
 
 struct chip_operations superio_nsc_pc87427_ops = {