C and other Super I/O cosmetic fixes.

[coreboot.git] / src / superio / nsc / pc87417 / superio.c

diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c
index 1eee9595bfbb17964d439c1e04ddf8b714531a18..fede61e6bd74a2e0a9d778d72a36274f34d5f2a9 100644 (file)
--- a/src/superio/nsc/pc87417/superio.c
+++ b/src/superio/nsc/pc87417/superio.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2000 AG Electronics Ltd.
  * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan by yhlu
+ * Copyright (C) 2004 Tyan
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -34,15 +34,12 @@
 
 static void init(device_t dev)
 {
-       struct superio_nsc_pc87417_config *conf;
+       struct superio_nsc_pc87417_config *conf = dev->chip_info;
        struct resource *res0;
-       /* Wishlist handle well known programming interfaces more
-        * generically.
-        */
-       if (!dev->enabled) {
+
+       if (!dev->enabled)
                return;
-       }
-       conf = dev->chip_info;
+
        switch(dev->path.pnp.device) {
        case PC87417_SP1:
                res0 = find_resource(dev, PNP_IDX_IO0);
@@ -67,16 +64,16 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-       { &ops, PC87417_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
-       { &ops, PC87417_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
-       { &ops, PC87417_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
-       { &ops, PC87417_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops, PC87417_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
-       { &ops, PC87417_KBCM, PNP_IRQ0 },
-       { &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
-       { &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
-       { &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
-       { &ops, PC87417_RTC,  PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} },
+       { &ops, PC87417_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0}, },
+       { &ops, PC87417_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x04f8, 0}, },
+       { &ops, PC87417_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
+       { &ops, PC87417_SP1,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+       { &ops, PC87417_SWC,  PNP_IO0 | PNP_IRQ0, {0xfff0, 0}, },
+       { &ops, PC87417_KBCM, PNP_IRQ0, },
+       { &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
+       { &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, {0xfff8, 0}, },
+       { &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+       { &ops, PC87417_RTC,  PNP_IO0 | PNP_IO1, {0xfffe, 0}, {0xfffe, 4}, },
 };
 
 static void enable_dev(struct device *dev)