C and other Super I/O cosmetic fixes.

[coreboot.git] / src / superio / nsc / pc8374 / pc8374_early_init.c

diff --git a/src/superio/nsc/pc8374/pc8374_early_init.c b/src/superio/nsc/pc8374/pc8374_early_init.c
index ac73b266024347e6cea27ac55ebbe97c60850cb2..29b57e43a9319ce5483a0864a33179402cc767b1 100644 (file)
--- a/src/superio/nsc/pc8374/pc8374_early_init.c
+++ b/src/superio/nsc/pc8374/pc8374_early_init.c
@@ -22,30 +22,31 @@
 #include <arch/romcc_io.h>
 #include "pc8374.h"
 
-/* things that Must Be Done to get this chip working */
-/* Straight from the data book */
-static void pc8374_enable(unsigned iobase, u8 *init)
+static void pc8374_enable(u16 iobase, u8 *init)
 {
        u8 val, count;
+
        outb(0x29, iobase);
-       val = inb(iobase+1);
+       val = inb(iobase + 1);
        val |= 0x91;
-       outb(val, iobase+1);
-       for(count = 0; count < 255; count++)
-               if (inb(iobase+1) == 0x91)
+       outb(val, iobase + 1);
+
+       for (count = 0; count < 255; count++)
+               if (inb(iobase + 1) == 0x91)
                        break;
-       for(;*init; init++) {
+
+       for (; *init; init++) {
                outb(*init, iobase);
-               val = inb(iobase+1);
+               val = inb(iobase + 1);
                init++;
                val &= *init;
                init++;
                val |= *init;
-               outb(val, iobase+1);
+               outb(val, iobase + 1);
        }
 }
 
-static void pc8374_enable_dev(device_t dev, unsigned iobase)
+static void pc8374_enable_dev(device_t dev, u16 iobase)
 {
        pnp_set_logical_device(dev);
        pnp_set_enable(dev, 0);