Random ITE Super I/O fixes.

[coreboot.git] / src / superio / ite / it8671f / it8671f_early_serial.c

diff --git a/src/superio/ite/it8671f/it8671f_early_serial.c b/src/superio/ite/it8671f/it8671f_early_serial.c
index 849235f1ce176f803267d10156e0233806640fb0..68062ec813257b2b4194680e5e27271c8d4b7dac 100644 (file)
--- a/src/superio/ite/it8671f/it8671f_early_serial.c
+++ b/src/superio/ite/it8671f/it8671f_early_serial.c
@@ -38,18 +38,14 @@
  * Special values used for entering MB PnP mode. The first four bytes of
  * each line determine the address port, the last four are data.
  */
-static const uint8_t init_values[] = {
+static const u8 init_values[] = {
        0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
        0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
        0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
        0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
 };
 
-/*
- * The content of IT8671F_CONFIG_REG_LDN (index 0x07) must be set to the
- * LDN the register belongs to, before you can access the register.
- */
-static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
+static void it8671f_sio_write(u8 ldn, u8 index, u8 value)
 {
        outb(IT8671F_CONFIG_REG_LDN, SIO_BASE);
        outb(ldn, SIO_DATA);
@@ -60,7 +56,7 @@ static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
 /* Enter the configuration state (MB PnP mode). */
 static void it8671f_enter_conf(void)
 {
-       uint8_t i;
+       int i;
 
        /* Perform MB PnP setup to put the SIO chip at 0x3f0. */
        /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
@@ -90,13 +86,15 @@ void it8671f_48mhz_clkin(void)
        it8671f_exit_conf();
 }
 
-/* Enable the serial ports on the IT8671F Super I/O chip. */
-static void it8671f_enable_serial(device_t dev, unsigned iobase)
+/* Enable the serial port(s). */
+static void it8671f_enable_serial(device_t dev, u16 iobase)
 {
        it8671f_enter_conf();
 
-       /* Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2),
-           PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7). */
+       /*
+        * Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2),
+         * PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7).
+        */
        it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f);
 
        /* Enable serial port(s). */