C and other Super I/O cosmetic fixes.

[coreboot.git] / src / superio / fintek / f71872 / superio.c

diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c
index 764dc541d34db6f84823142ef269a01bd75302b8..f1a27e470de4108c5b79dbe1259b7f4f7aca9008 100644 (file)
--- a/src/superio/fintek/f71872/superio.c
+++ b/src/superio/fintek/f71872/superio.c
@@ -92,15 +92,15 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-       /* TODO: Some of the 0x7f8 etc. values may not be correct. */
-       { &ops, F71872_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0 }, },
-       { &ops, F71872_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops, F71872_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops, F71872_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0 }, },
-       { &ops, F71872_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
-       { &ops, F71872_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0 }, },
+       /* TODO: Some of the 0x07f8 etc. values may not be correct. */
+       { &ops, F71872_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+       { &ops, F71872_SP1,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+       { &ops, F71872_SP2,  PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+       { &ops, F71872_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+       { &ops, F71872_HWM,  PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+       { &ops, F71872_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
        { &ops, F71872_GPIO, PNP_IRQ0, },
-       { &ops, F71872_VID,  PNP_IO0, { 0x0ff8, 0 }, },
+       { &ops, F71872_VID,  PNP_IO0, {0x0ff8, 0}, },
        { &ops, F71872_PM, },
 };