In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.

[coreboot.git] / src / southbridge / intel / i82801gx / i82801gx.h

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 1f320c51827601632a8d301ba61e2577ac40baee..63c583dea5b857901cbc6d03287ab4e6555e08f0 100644 (file)
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -32,21 +32,41 @@
 #define DEFAULT_GPIOBASE       0x0480
 #define DEFAULT_PMBASE         0x0500
 
-#define IO_APIC_ADDR           0xfec00000
 #define HPET_ADDR              0xfed00000
 #define DEFAULT_RCBA           0xfed1c000
 
 #ifndef __ACPI__
 #define DEBUG_PERIODIC_SMIS 0
 
-/* __ROMCC__ is set by romstage.c to make sure
- * none of the stage2 data structures are included.
- */
-#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
+#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801gx_enable(device_t dev);
+#else
+void enable_smbus(void);
+int smbus_read_byte(unsigned device, unsigned address);
+#endif
+void i82801gx_enable_usbdebug(unsigned int port);
+#endif
+
+#define MAINBOARD_POWER_OFF    0
+#define MAINBOARD_POWER_ON     1
+#define MAINBOARD_POWER_KEEP   2
+
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
 #endif
 
+/* PCI Configuration Space (D30:F0): PCI2PCI */
+#define PSTS   0x06
+#define SMLT   0x1b
+#define SECSTS 0x1e
+#define INTR   0x3c
+#define BCTRL  0x3e
+#define   SBR  (1 << 6)
+#define   SEE  (1 << 1)
+#define   PERE (1 << 0)
+
 /* PCI Configuration Space (D31:F0): LPC */
 
 #define SERIRQ_CNTL            0x64