remove trailing whitespace

[coreboot.git] / src / southbridge / amd / rs780 / gfx.c

diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c
index 9262bb94371dc6428d7bfea747c2d71a104cf8d7..65a5e2bd2f21557eabc6bdf8a3c3149ef7114752 100644 (file)
--- a/src/southbridge/amd/rs780/gfx.c
+++ b/src/southbridge/amd/rs780/gfx.c
@@ -511,7 +511,7 @@ static void internal_gfx_pci_dev_init(struct device *dev)
                        vgainfo.ucUMAChannelNumber = 2;
                }
        }
-      
+
        // processor type
        if (is_family0Fh())
                vgainfo.ulCPUCapInfo = 3;
@@ -539,9 +539,9 @@ static void internal_gfx_pci_dev_init(struct device *dev)
 
        /* HT width. */
        value = pci_read_config8(nb_dev, 0xcb);
-       vgainfo.usMinDownStreamHTLinkWidth = 
-       vgainfo.usMaxDownStreamHTLinkWidth = 
-       vgainfo.usMinUpStreamHTLinkWidth = 
+       vgainfo.usMinDownStreamHTLinkWidth =
+       vgainfo.usMaxDownStreamHTLinkWidth =
+       vgainfo.usMinUpStreamHTLinkWidth =
        vgainfo.usMaxUpStreamHTLinkWidth =
        vgainfo.usMinHTLinkWidth =
        vgainfo.usMaxHTLinkWidth = ht_width_lookup [extractbits(value, 0, 2)];
@@ -1009,6 +1009,7 @@ static void single_port_configuration(device_t nb_dev, device_t dev)
                        set_nbmisc_enable_bits(nb_dev, 0x7, 1 << 3, 1 << 3);
                }
        } else {                /* step 13.b Link Training was successful */
+               AtiPcieCfg.PortDetect |= 1 << 2; /* Port 2 */
                set_pcie_enable_bits(dev, 0xA2, 0xFF, 0x1);
                reg32 = nbpcie_p_read_index(dev, 0x29);
                width = reg32 & 0xFF;
@@ -1064,6 +1065,7 @@ static void dual_port_configuration(device_t nb_dev, device_t dev)
                set_nbmisc_enable_bits(nb_dev, 0x0c, 1 << dev_ind, 1 << dev_ind);
 
        } else {                /* step 16.b Link Training was successful */
+               AtiPcieCfg.PortDetect |= 1 << dev_ind;
                reg32 = nbpcie_p_read_index(dev, 0xa2);
                width = (reg32 >> 4) & 0x7;
                printk(BIOS_DEBUG, "GFX LC_LINK_WIDTH = 0x%x.\n", width);