cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doing a
[coreboot.git] / src / southbridge / amd / cs5536 / cs5536_ide.c
index c20fada5179d0366646d2e675e0b315eb424b2ea..b0d711c948c50032666b0f64353223582d7911ba 100644 (file)
@@ -43,7 +43,7 @@ static void ide_init(struct device *dev)
        // NOTE: Only 32-bit writes to the data buffer are allowed when PWB is set
        ide_cfg = pci_read_config32(dev, IDE_CFG);
        ide_cfg |= CHANEN | PWB;
-       pci_write_config8(dev, IDE_CFG, ide_cfg);
+       pci_write_config32(dev, IDE_CFG, ide_cfg);
 }
 
 static void ide_enable(struct device *dev)