AMD SB800 southbridge update

[coreboot.git] / src / southbridge / amd / cimx / sb800 / SBPLATFORM.h

diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
index 89b4dc3c85c7c74cebc8a07697b3923f4e0cba74..164a65156f8c57136e424305410bb33bf2d0d10c 100644 (file)
--- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
+++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
@@ -120,6 +120,7 @@ typedef union _PCI_ADDR {
 #define cimIrConfigDefault              0x00      // Disable
 #define cimSpiFastReadEnableDefault     0x01      // Enable
 #define cimSpiFastReadSpeedDefault      0x01      // 33 MHz
+#define cimSioHwmPortEnableDefault      FALSE
 // GPP/AB Controller 
 #define cimNbSbGen2Default              TRUE
 #define cimAlinkPhyPllPowerDownDefault  TRUE