Since some people disapprove of white space cleanups mixed in regular commits
[coreboot.git] / src / northbridge / via / vx800 / timing_setting.c
index a1d8e748123236880900cd1c9f2090320457423a..7668b22e0baebafd1bf76f980eaeab59bbf353fb 100644 (file)
@@ -72,7 +72,7 @@ void DRAMTimingSetting(DRAM_SYS_ATTR * DramAttr)
 
 /*
 Set DRAM Timing: CAS Latency for DDR1
-D0F3RX62 bit[0:2] for CAS Latency; 
+D0F3RX62 bit[0:2] for CAS Latency;
 */
 void SetCL(DRAM_SYS_ATTR * DramAttr)
 {