Some more DIMM0 related cleanups and deduplication.

[coreboot.git] / src / northbridge / intel / i82830 / raminit.h

diff --git a/src/northbridge/intel/i82830/raminit.h b/src/northbridge/intel/i82830/raminit.h
index 3b4bf5fb2e46252c955219d04501af7ad1486235..f54409bf4e32ba21991c6c51371170d15ea48593 100644 (file)
--- a/src/northbridge/intel/i82830/raminit.h
+++ b/src/northbridge/intel/i82830/raminit.h
@@ -27,7 +27,4 @@
 /* The 82830 supports max. 2 dual-sided SO-DIMMs. */
 #define DIMM_SOCKETS   2
 
-/* DIMM0 is at 0x50, DIMM1 is at 0x51. */
-#define DIMM_SPD_BASE  0x50
-
 #endif /* NORTHBRIDGE_INTEL_I82830_RAMINIT_H */