Some more DIMM0 related cleanups and deduplication.

[coreboot.git] / src / northbridge / intel / i82810 / raminit.h

diff --git a/src/northbridge/intel/i82810/raminit.h b/src/northbridge/intel/i82810/raminit.h
index fbf64239b214d39a822cd64f9a195c3dbcff728b..186589a759f0d8999d24ea3a87c400746818c761 100644 (file)
--- a/src/northbridge/intel/i82810/raminit.h
+++ b/src/northbridge/intel/i82810/raminit.h
@@ -24,9 +24,6 @@
 /* The 82810 supports max. 2 dual-sided DIMMs. */
 #define DIMM_SOCKETS   2
 
-/* DIMM0 is at 0x50, DIMM1 is at 0x51. */
-#define DIMM_SPD_BASE 0x50
-
 /* Function prototypes. */
 void sdram_set_registers(void);
 void sdram_set_spd_registers(void);