Some more DIMM0 related cleanups and deduplication.

[coreboot.git] / src / northbridge / intel / i440bx / raminit.h

diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h
index 18268a1e823ac62d4eafe75f6bf4e5f560dfd683..4bc07967fd76b1d8b84b5f204350e30fdcbdd5ae 100644 (file)
--- a/src/northbridge/intel/i440bx/raminit.h
+++ b/src/northbridge/intel/i440bx/raminit.h
@@ -24,9 +24,6 @@
 /* The 440BX supports up to four (single- or double-sided) DIMMs. */
 #define DIMM_SOCKETS   4
 
-/* DIMMs 1-4 are at 0x50, 0x51, 0x52, 0x53. */
-#define DIMM_SPD_BASE  0x50
- 
 /* Function prototypes. */
 int spd_read_byte(unsigned int device, unsigned int address);
 void sdram_set_registers(void);