amdfam10: add phenom II as known cpu
[coreboot.git] / src / northbridge / amd / amdfam10 / raminit_amdmct.c
index c9f0c27b0b2b750e9d9fdbbb2274a1f44e9baa59..973384bb78dd24c4750b880608e68b824bdcf243 100644 (file)
  */
 
 
-static  void print_raminit(const char *strval, u32 val)
-{
-       printk_debug("%s%08x\n", strval, val);
-}
-
+#if (CONFIG_DIMM_SUPPORT & 0x000F)!=0x0005 /* not needed for AMD_FAM10_DDR3 */
 static  void print_tx(const char *strval, u32 val)
 {
 #if CONFIG_DEBUG_RAM_SETUP
-       print_raminit(strval, val);
+       printk(BIOS_DEBUG, "%s%08x\n", strval, val);
 #endif
 }
+#endif
 
 static  void print_t(const char *strval)
 {
 #if CONFIG_DEBUG_RAM_SETUP
-       print_debug(strval);
+       printk(BIOS_DEBUG, "%s", strval);
 #endif
 }
+
+#if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */
+#include "amdfam10.h"
+#include "../amdmct/wrappers/mcti.h"
+#include "../amdmct/amddefs.h"
+#include "../amdmct/mct_ddr3/mwlc_d.h"
+#include "../amdmct/mct_ddr3/mct_d.h"
+#include "../amdmct/mct_ddr3/mct_d_gcc.h"
+
+#include "../amdmct/wrappers/mcti_d.c"
+#include "../amdmct/mct_ddr3/mct_d.c"
+
+#include "../amdmct/mct_ddr3/mctmtr_d.c"
+#include "../amdmct/mct_ddr3/mctcsi_d.c"
+#include "../amdmct/mct_ddr3/mctecc_d.c"
+#include "../amdmct/mct_ddr3/mctdqs_d.c"
+#include "../amdmct/mct_ddr3/mctsrc.c"
+#include "../amdmct/mct_ddr3/mctsdi.c"
+#include "../amdmct/mct_ddr3/mctproc.c"
+#include "../amdmct/mct_ddr3/mctprob.c"
+#include "../amdmct/mct_ddr3/mcthwl.c"
+#include "../amdmct/mct_ddr3/mctwl.c"
+#include "../amdmct/mct_ddr3/mport_d.c"
+#include "../amdmct/mct_ddr3/mutilc_d.c"
+#include "../amdmct/mct_ddr3/modtrdim.c"
+#include "../amdmct/mct_ddr3/mhwlc_d.c"
+#include "../amdmct/mct_ddr3/mctrci.c"
+#include "../amdmct/mct_ddr3/mctsrc1p.c"
+#include "../amdmct/mct_ddr3/mcttmrl.c"
+#include "../amdmct/mct_ddr3/mcthdi.c"
+#include "../amdmct/mct_ddr3/mctndi_d.c"
+#include "../amdmct/mct_ddr3/mctchi_d.c"
+#include "../amdmct/mct_ddr3/modtrd.c"
+
+#if CONFIG_CPU_SOCKET_TYPE == 0x10
+//TODO: S1G1?
+#elif CONFIG_CPU_SOCKET_TYPE == 0x11
+//AM3
+#include "../amdmct/mct_ddr3/mctardk5.c"
+#elif CONFIG_CPU_SOCKET_TYPE == 0x12
+//F (1207), Fr2, G (1207)
+#include "../amdmct/mct_ddr3/mctardk6.c"
+#elif CONFIG_CPU_SOCKET_TYPE == 0x13
+//ASB2
+#include "../amdmct/mct_ddr3/mctardk5.c"
+//C32
+#elif CONFIG_CPU_SOCKET_TYPE == 0x14
+#include "../amdmct/mct_ddr3/mctardk5.c"
+#endif
+
+#else  /* DDR2 */
+
 #include "amdfam10.h"
 #include "../amdmct/wrappers/mcti.h"
 #include "../amdmct/amddefs.h"
@@ -69,7 +118,7 @@ static  void print_t(const char *strval)
 //#include "../amdmct/mct/mctardk5.c"
 #endif
 
-#include "../amdmct/mct/mct_fd.c"
+#endif /* DDR2 */
 
 int mctRead_SPD(u32 smaddr, u32 reg)
 {
@@ -147,9 +196,24 @@ u32 mctGetLogicalCPUID(u32 Node)
        case 0x10042:
                ret = AMD_RB_C2;
                break;
+       case 0x10043:
+               ret = AMD_RB_C3;
+               break;
        case 0x10062:
                ret = AMD_DA_C2;
                break;
+       case 0x10063:
+               ret = AMD_DA_C3;
+               break;
+       case 0x10080:
+               ret = AMD_HY_D0;
+               break;
+       case 0x10081:
+               ret = AMD_HY_D1;
+               break;
+       case 0x100a0:
+               ret = AMD_PH_E0;
+               break;
        default:
                /* FIXME: mabe we should die() here. */
                print_err("FIXME! CPU Version unknown or not supported! \n");
@@ -159,8 +223,13 @@ u32 mctGetLogicalCPUID(u32 Node)
        return ret;
 }
 
+static u8 mctGetProcessorPackageType(void) {
+       /* FIXME: I guess this belongs wherever mctGetLogicalCPUID ends up ? */
+     u32 BrandId = cpuid_ebx(0x80000001);
+     return (u8)((BrandId >> 28) & 0x0F);
+}
 
-void raminit_amdmct(struct sys_info *sysinfo)
+static void raminit_amdmct(struct sys_info *sysinfo)
 {
        struct MCTStatStruc *pMCTstat = &(sysinfo->MCTstat);
        struct DCTStatStruc *pDCTstatA = sysinfo->DCTstatA;