remove trailing whitespace

[coreboot.git] / src / northbridge / amd / amdfam10 / amdfam10.h

diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h
index 472e55594fae75342674ecfaa342b12c78512612..99518065defbabd35801c78a39f765c97c644f98 100644 (file)
--- a/src/northbridge/amd/amdfam10/amdfam10.h
+++ b/src/northbridge/amd/amdfam10/amdfam10.h
@@ -953,8 +953,18 @@ that are corresponding to 0x01, 0x02, 0x03, 0x05, 0x06, 0x07
 #define NonCoherent       (1 << 2)
 #define ConnectionPending (1 << 4)
 
+// Use the LAPIC timer count register to hold each core's init status
+//   Format: byte 0 - state
+//           byte 1 - fid_max
+//           byte 2 - nb_cof_vid_update
+//           byte 3 - apic id
 
-#include "amdfam10_nums.h"
+#define LAPIC_MSG_REG 0x380
+#define F10_APSTATE_STARTED 0x13  // start of AP execution
+#define F10_APSTATE_STOPPED 0x14  // allow AP to stop
+#define F10_APSTATE_RESET   0x01  // waiting for warm reset
+
+#include "nums.h"
 
 #ifdef __PRE_RAM__
 #if NODE_NUMS==64
@@ -1179,6 +1189,17 @@ void setup_resource_map_x_offset(const u32 *register_values, u32 max, u32
                offset_pci_dev, u32 offset_io_base);
 
 void setup_resource_map_x(const u32 *register_values, u32 max);
+
+/* reset_test.c */
+u32 cpu_init_detected(u8 nodeid);
+u32 bios_reset_detected(void);
+u32 cold_reset_detected(void);
+u32 other_reset_detected(void);
+u32 get_sblk(void);
+u8 get_sbbusn(u8 sblk);
 #endif
 
+#include "northbridge/amd/amdht/porting.h"
+BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List);
+
 #endif /* AMDFAM10_H */