Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / tyan / s2912 / romstage.c

diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index efb95254886d66684f63b64d88dcfa02678aae35..745c00081a472b519dd4f6834cf9945b27fc2dcc 100644 (file)
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -35,6 +35,7 @@
 
 #include <console/console.h>
 #include <lib.h>
+#include <spd.h>
 #include <usbdebug.h>
 
 #include <cpu/amd/model_fxx_rev.h>
@@ -130,11 +131,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
        static const uint16_t spd_addr [] = {
                        // Node 0
-                       (0xa<<3)|0, (0xa<<3)|2, 0, 0,
-                       (0xa<<3)|1, (0xa<<3)|3, 0, 0,
+                       DIMM0, DIMM2, 0, 0,
+                       DIMM1, DIMM3, 0, 0,
                        // Node 1
-                       (0xa<<3)|4, (0xa<<3)|6, 0, 0,
-                       (0xa<<3)|5, (0xa<<3)|7, 0, 0,
+                       DIMM4, DIMM6, 0, 0,
+                       DIMM5, DIMM7, 0, 0,
        };
 
        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE