Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / tyan / s2882 / romstage.c

diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c
index c49dff9f100c2f0d294ba889f88373e07f484692..d8816d4cff96988634f63ee32984b30ee9cff3c2 100644 (file)
--- a/src/mainboard/tyan/s2882/romstage.c
+++ b/src/mainboard/tyan/s2882/romstage.c
@@ -1,4 +1,4 @@
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -129,7 +129,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                init_cpus(cpu_init_detectedx);
         }
 
-       
+
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
@@ -140,7 +140,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
-       
+
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();