Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / supermicro / x6dhr_ig / devicetree.cb

diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
index 921c54fff5b5d74c1e682e605448a8de40b34cf3..b989e76e8aa44e73bf9148b16a450a8fe2478199 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
@@ -1,21 +1,21 @@
 chip northbridge/intel/e7520 # mch
-       device pci_domain 0 on 
+       device pci_domain 0 on
                chip southbridge/intel/i82801ex # i82801er
                        # USB ports
                        device pci 1d.0 on end
                        device pci 1d.1 on end
-                       device pci 1d.2 on end 
+                       device pci 1d.2 on end
                        device pci 1d.3 on end
                        device pci 1d.7 on end
-               
+
                        # -> VGA
                        device pci 1e.0 on end
-               
+
                        # -> IDE
-                       device pci 1f.0 on 
+                       device pci 1f.0 on
                                chip superio/winbond/w83627hf
                                        device pnp 2e.0 off end
-                                       device pnp 2e.2 on 
+                                       device pnp 2e.2 on
                                                 io 0x60 = 0x3f8
                                                irq 0x70 = 4
                                        end
@@ -39,18 +39,18 @@ chip northbridge/intel/e7520 # mch
                        register "pirq_a_d" = "0x0b070a05"
                        register "pirq_e_h" = "0x0a808080"
                end
-               device pci 00.0 on end 
+               device pci 00.0 on end
                device pci 00.1  on end
-               device pci 01.0 on end 
-               device pci 02.0 on end 
-               device pci 03.0 on 
+               device pci 01.0 on end
+               device pci 02.0 on end
+               device pci 03.0 on
                        chip southbridge/intel/pxhd # pxhd1
                                # Bus bridges and ioapics usually bus 2
                                device pci 0.0 on end
                                device pci 0.1 on end
-                               device pci 0.2 on 
+                               device pci 0.2 on
                                # On board gig e1000
-                                       chip drivers/generic/generic 
+                                       chip drivers/generic/generic
                                                device pci 02.0 on end
                                                device pci 02.1 on end
                                        end
@@ -58,7 +58,7 @@ chip northbridge/intel/e7520 # mch
                                device pci 0.3 on end
                        end
                end
-               device pci 04.0 on 
+               device pci 04.0 on
                        chip southbridge/intel/pxhd # pxhd2
                                # Bus bridges and ioapics usually bus 5
                                device pci 0.0 on end