After this has been brought up many times before, rename src/arch/i386 to
[coreboot.git] / src / mainboard / supermicro / x6dai_g / romstage.c
index af54f80c61e06e76e70ddf2f00764c3c45e5dc3c..87992cc6e579ecfc971f53123186d3e8dd6418d6 100644 (file)
@@ -5,13 +5,10 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
-#include "southbridge/intel/esb6300/esb6300_early_smbus.c"
+#include "southbridge/intel/esb6300/early_smbus.c"
 #include "northbridge/intel/e7525/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "debug.c"
 #include "watchdog.c"
 #include "reset.c"
-#include "superio/winbond/w83627hf/w83627hf_early_init.c"
+#include "superio/winbond/w83627hf/early_serial.c"
 #include "northbridge/intel/e7525/memory_initialized.c"
 #include "cpu/x86/bist.h"
-
-#define SIO_GPIO_BASE 0x680
-#define SIO_XBUS_BASE 0x4880
+#include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define HIDDEN_SERIAL_DEV  PNP_DEV(0x2e, W83627HF_SP2)
+#define DUMMY_DEV PNP_DEV(0x2e, 0)
 
 #define DEVPRES_CONFIG  ( \
        DEVPRES_D1F0 | \
@@ -38,9 +34,6 @@
        0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-#define RECVENA_CONFIG  0x0808090a
-#define RECVENB_CONFIG  0x0808090a
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
@@ -48,14 +41,10 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7525/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {
-       /*
-        *
-        *
-        */
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
@@ -63,23 +52,20 @@ static void main(unsigned long bist)
                        .f1 = PCI_DEV(0, 0x00, 1),
                        .f2 = PCI_DEV(0, 0x00, 2),
                        .f3 = PCI_DEV(0, 0x00, 3),
-                       .channel0 = {(0xa<<3)|3, (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, },
-                       .channel1 = {(0xa<<3)|7, (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, },
+                       .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
+                       .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
                }
        };
 
        if (bist == 0) {
                /* Skip this if there was a built in self test failure */
                early_mtrr_init();
-               if (memory_initialized()) {
+               if (memory_initialized())
                        skip_romstage();
-               }
        }
-       /* Setup the console */
-       outb(0x87,0x2e);
-       outb(0x87,0x2e);
-       pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
-       w83627hf_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
+
+       w83627hf_set_clksel_48(DUMMY_DEV);
+       w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
        console_init();
 
@@ -87,16 +73,13 @@ static void main(unsigned long bist)
        /* config LPC decode for flash memory access */
         device_t dev;
         dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
-        if (dev == PCI_DEV_INVALID) {
+        if (dev == PCI_DEV_INVALID)
                 die("Missing 6300ESB?");
-        }
         pci_write_config32(dev, 0xe8, 0x00000000);
         pci_write_config8(dev, 0xf0, 0x00);
 
 #if 0
        display_cpuid_update_microcode();
-#endif
-#if 0
        print_pci_devices();
 #endif
 #if 1
@@ -104,9 +87,8 @@ static void main(unsigned long bist)
 #endif
 #if 0
        int i;
-       for(i = 0; i < 1; i++) {
+       for(i = 0; i < 1; i++)
                dump_spd_registers();
-       }
 #endif
        disable_watchdogs();
        sdram_initialize(ARRAY_SIZE(mch), mch);
@@ -114,23 +96,4 @@ static void main(unsigned long bist)
        dump_pci_device(PCI_DEV(0, 0x00, 0));
 //     dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
-
-#if 0 // temporarily disabled
-       /* Check the first 1M */
-//     ram_check(0x00000000, 0x000100000);
-//     ram_check(0x00000000, 0x000a0000);
-       ram_check(0x00100000, 0x01000000);
-       /* check the first 1M in the 3rd Gig */
-       ram_check(0x30100000, 0x31000000);
-#endif
-#if 0
-       ram_check(0x00000000, 0x02000000);
-#endif
-
-#if 0
-       while(1) {
-               hlt();
-       }
-#endif
 }
-