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zero warning days. Move RAMTOP and RAMBASE together.
[coreboot.git]
/
src
/
mainboard
/
supermicro
/
h8dmr_fam10
/
romstage.c
diff --git
a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index b1c20332cd4d145b497a5c8dc674ebf37c0a97b6..a60a4a610aafebc0c5f7c84f6af872566b625b23 100644
(file)
--- a/
src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/
src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@
-116,8
+116,6
@@
static inline int spd_read_byte(unsigned device, unsigned address)
static void sio_setup(void)
{
-
- unsigned value;
uint32_t dword;
uint8_t byte;
enable_smbus();