Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / supermicro / h8dme / romstage.c

diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index de3bc2c35f8d704222731d922fe4182e21bc7414..ac3ee68857cd3b04e0fd6a0d70bfd39693c5aa86 100644 (file)
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -49,9 +49,7 @@
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-}
+static void memreset(int controllers, const struct mem_controller *ctrl) { }
 
 static inline void dump_smbus_registers(void)
 {
@@ -183,25 +181,19 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
                + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
-
        int needs_reset = 0;
        unsigned bsp_apicid = 0;
 
        if (!cpu_init_detectedx && boot_cpu()) {
                /* Nothing special needs to be done to find bus 0 */
                /* Allow the HT devices to be found */
-
                enumerate_ht_chain();
-
                sio_setup();
-
-               /* Setup the mcp55 */
                mcp55_enable_rom();
        }
 
-       if (bist == 0) {
+       if (bist == 0)
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
-       }
 
        pnp_enter_ext_func_mode(SERIAL_DEV);
        pnp_write_config(SERIAL_DEV, 0x24, 0x84 | (1 << 6));
@@ -243,7 +235,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        ht_setup_chains_x(sysinfo);     // it will init sblnk and sbbusn, nodes, sbdn
 
 #if CONFIG_SET_FIDVID
-
        {
                msr_t msr;
                msr = rdmsr(0xc0010042);
@@ -251,15 +242,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                print_debug_hex32(msr.hi);
                print_debug_hex32(msr.lo);
                print_debug("\n");
-
        }
-
        enable_fid_change();
-
        enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
-
        init_fidvid_bsp(bsp_apicid);
-
        // show final fid and vid
        {
                msr_t msr;
@@ -268,7 +254,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                print_debug_hex32(msr.hi);
                print_debug_hex32(msr.lo);
                print_debug("\n");
-
        }
 #endif