Remove various .c #includes from Intel 440BX/82371EB boards.

[coreboot.git] / src / mainboard / soyo / sy-6ba-plus-iii / romstage.c

diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
index c608aac86ab99e16ec49c6fa1959b148bea77f64..99eb7b6b717395c8ff0686688fe943e6646d82f4 100644 (file)
--- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
+++ b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
@@ -26,9 +26,8 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include <console/console.h>
-#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
+#include "southbridge/intel/i82371eb/i82371eb.h"
 #include "northbridge/intel/i440bx/raminit.h"
-#include "lib/debug.c"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "cpu/x86/bist.h"
@@ -38,14 +37,14 @@ void it8671f_48mhz_clkin(void);
 
 #define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1)
 
-static inline int spd_read_byte(unsigned int device, unsigned int address)
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+
+int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);
 }
 
-#include "northbridge/intel/i440bx/raminit.c"
-#include "northbridge/intel/i440bx/debug.c"
-
 void main(unsigned long bist)
 {
        it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);