Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / msi / ms7135 / romstage.c

diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 2aa77409984c1eadcc06f4c4493d1a9c5d14a829..ca3185738278a20f3eaf1aa4218278559187817c 100644 (file)
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -49,6 +49,7 @@
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "cpu/amd/dualcore/dualcore.c"
+#include <spd.h>
 
 static void memreset(int controllers, const struct mem_controller *ctrl)
 {
@@ -95,7 +96,7 @@ static void sio_setup(void)
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
        static const uint16_t spd_addr[] = {
-               (0xa << 3) | 0, (0xa << 3) | 1, 0, 0,
+               DIMM0, DIMM1, 0, 0,
                0, 0, 0, 0,
                0, 0, 0, 0,
                0, 0, 0, 0,