After this has been brought up many times before, rename src/arch/i386 to
[coreboot.git] / src / mainboard / intel / mtarvon / romstage.c
index 68e94ec40ef4fc8d747bda1ca49473448bad9cc5..f1e7676c5499570464e687a9e97d9d1ffa4729ff 100644 (file)
@@ -50,7 +50,7 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "northbridge/intel/i3100/raminit.c"
 #include "lib/generic_sdram.c"
 #if 0 /* skip_romstage doesn't compile with gcc */
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 #endif
 
 void main(unsigned long bist)