After this has been brought up many times before, rename src/arch/i386 to

[coreboot.git] / src / mainboard / intel / mtarvon / romstage.c

diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 525f02e7a0610728234d21d7d31dbd08153619c0..f1e7676c5499570464e687a9e97d9d1ffa4729ff 100644 (file)
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -27,12 +27,12 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include "southbridge/intel/i3100/i3100_early_smbus.c"
-#include "southbridge/intel/i3100/i3100_early_lpc.c"
+#include "southbridge/intel/i3100/early_smbus.c"
+#include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit.h"
 #include "superio/intel/i3100/i3100.h"
 #include "cpu/x86/mtrr/earlymtrr.c"
-#include "superio/intel/i3100/i3100_early_serial.c"
+#include "superio/intel/i3100/early_serial.c"
 #include "northbridge/intel/i3100/memory_initialized.c"
 #include "cpu/x86/bist.h"
 #include <spd.h>
@@ -50,7 +50,7 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "northbridge/intel/i3100/raminit.c"
 #include "lib/generic_sdram.c"
 #if 0 /* skip_romstage doesn't compile with gcc */
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 #endif
 
 void main(unsigned long bist)
@@ -118,6 +118,4 @@ void main(unsigned long bist)
        /* dump_pci_devices(); */
        /* dump_pci_device(PCI_DEV(0, 0x00, 0)); */
        /* dump_bar14(PCI_DEV(0, 0x00, 0)); */
-
-       ram_check(0, 1024 * 1024);
 }