Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / intel / jarrell / romstage.c

diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 530c22ae2493984b8531451ead5e69b16cd406da..22f5937e020c59426a016a48db487f2a4cdef2f1 100644 (file)
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -19,6 +19,7 @@
 #include "superio/nsc/pc87427/pc87427_early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
+#include <spd.h>
 
 #define SIO_GPIO_BASE 0x680
 #define SIO_XBUS_BASE 0x4880
@@ -41,10 +42,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static void main(unsigned long bist)
 {
-       /*
-        *
-        *
-        */
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
@@ -54,8 +51,8 @@ static void main(unsigned long bist)
                        .f2 = PCI_DEV(0, 0x00, 2),
                        .f3 = PCI_DEV(0, 0x00, 3),
                        */
-                       .channel0 = { (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, 0 },
-                       .channel1 = { (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, 0 },
+                       .channel0 = { DIMM2, DIMM1, DIMM0, 0 },
+                       .channel1 = { DIMM6, DIMM5, DIMM4, 0 },
                }
        };