Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / ibm / e325 / romstage.c

diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c
index 0200fcd0408bdeb4314d9144b534c2ba4c0f7c5a..7697450b0eb21537f78c7bc055a27ce51c2801a2 100644 (file)
--- a/src/mainboard/ibm/e325/romstage.c
+++ b/src/mainboard/ibm/e325/romstage.c
@@ -1,4 +1,4 @@
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_ibm_e325_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
-       
+
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();