Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / hp / dl145_g3 / romstage.c

diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index d2e393cbe137759cf0099010c2c454990b19d468..70f829a07ff62e602f8558931282b9640d50ee13 100644 (file)
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -146,8 +146,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
        static const uint16_t spd_addr[] = {
                // first node
-                DIMM0, DIMM2, 0, 0,
-                DIMM1, DIMM3, 0, 0,
+               DIMM0, DIMM2, 0, 0,
+               DIMM1, DIMM3, 0, 0,
 
                // second node
                DIMM4, DIMM6, 0, 0,