Drop excessive whitespace randomly sprinkled in romstage.c files.

[coreboot.git] / src / mainboard / getac / p470 / romstage.c

diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index 5416d0cdae9036580a95c834fd90471d520a7d39..788f42cb35c8a55ded18dfbd7246103a85c22982 100644 (file)
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -28,12 +28,9 @@
 #include <cpu/x86/lapic.h>
 #include <lib.h>
 #include <usbdebug.h>
-
 #include <pc80/mc146818rtc.h>
-
 #include <console/console.h>
 #include <cpu/x86/bist.h>
-
 #include "northbridge/intel/i945/i945.h"
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
@@ -100,7 +97,6 @@ static void ich7_enable_lpc(void)
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x00040069);
 }
 
-
 /* This box has two superios, so enabling serial becomes slightly excessive.
  * We disable a lot of stuff to make sure that there are no conflicts between
  * the two. Also set up the GPIOs from the beginning. This is the "no schematic
@@ -398,4 +394,3 @@ void main(unsigned long bist)
        }
 #endif
 }
-