/*
* This file is part of the coreboot project.
- *
+ *
* Copyright (C) 2007-2010 coresystems GmbH
*
* This program is free software; you can redistribute it and/or
#include <string.h>
#include <console/console.h>
#include <arch/acpi.h>
+#include <arch/ioapic.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include "dmi.h"
extern unsigned char AmlCode[];
-#include "southbridge/intel/i82801gx/i82801gx_nvs.h"
+#include "southbridge/intel/i82801gx/nvs.h"
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
static long acpi_create_ecdt(acpi_ecdt_t * ecdt)
{
- /* Attention: Make sure these match the values from
+ /* Attention: Make sure these match the values from
* the DSDT's ec.asl
*/
static const char ec_id[] = "\\_SB.PCI0.LPCB.EC0";
ecdt->ec_data.addrh = 0;
ecdt->uid = 1; // Must match _UID of the EC0 node.
-
+
ecdt->gpe_bit = 23; // SCI interrupt within GPEx_STS
strncpy((char *)ecdt->ec_id, ec_id, strlen(ec_id));
return header->length;
}
-#define IO_APIC_ADDR 0xfec00000UL
-
unsigned long acpi_fill_madt(unsigned long current)
{
/* Local APICs */
current += dsdt->length;
memcpy(dsdt, &AmlCode, dsdt->length);
- /* Fix up global NVS region for SMI handler. The GNVS region lives
+ /* Fix up global NVS region for SMI handler. The GNVS region lives
* in the (high) table area. The low memory map looks like this:
*
* 0x00000000 - 0x000003ff Real Mode IVT
current += 0x100;
ALIGN_CURRENT;
-
+
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, smi1);
ALIGN_CURRENT;
printk(BIOS_DEBUG, "current = %lx\n", current);
-
- printk(BIOS_DEBUG, "ACPI: * DMI (Linux workaround)\n");
- memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE);
-#if CONFIG_WRITE_HIGH_TABLES == 1
- memcpy((void *)current, dmi_table, DMI_TABLE_SIZE);
- current += DMI_TABLE_SIZE;
- ALIGN_CURRENT;
-#endif
-
printk(BIOS_INFO, "ACPI: done.\n");
return current;
}