After this has been brought up many times before, rename src/arch/i386 to

[coreboot.git] / src / mainboard / dell / s1850 / romstage.c

diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index 17a4113afd8cc73248ef658bbced979e9df7e38c..0a051d2140526a47a520877780dbc3cc12aa79e8 100644 (file)
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -5,14 +5,10 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
+#include <console/console.h>
+#include "southbridge/intel/i82801ex/early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
-#include "superio/nsc/pc8374/pc8374_early_init.c"
+#include "superio/nsc/pc8374/early_init.c"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "debug.c"
@@ -22,9 +18,7 @@
 #include "s1850_fixups.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
-
-#define SIO_GPIO_BASE 0x680
-#define SIO_XBUS_BASE 0x4880
+#include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC8374_SP1)
 
@@ -38,21 +32,11 @@
        0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-#define RECVENA_CONFIG  0x0808090a
-#define RECVENB_CONFIG  0x0808090a
-
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-       /* nothing to do */
-}
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
 }
 
-/* this is very highly mainboard dependent, related to wiring */
-/* from factory BIOS via lspci */
-#define DIMM_MAP_LOGICAL 0x2841
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 
@@ -69,7 +53,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static inline void  ibfzero(void)
 {
-       while(inb(ipmicsr) &  (1<<IBF)) 
+       while(inb(ipmicsr) &  (1<<IBF))
                ;
 }
 static inline void  clearobf(void)
@@ -79,9 +63,10 @@ static inline void  clearobf(void)
 
 static inline void  waitobf(void)
 {
-       while((inb(ipmicsr) &  (1<<OBF)) == 0) 
+       while((inb(ipmicsr) &  (1<<OBF)) == 0)
                ;
 }
+
 /* quite possibly the stupidest interface ever designed. */
 static inline void  first_cmd_byte(unsigned char byte)
 {
@@ -157,29 +142,22 @@ static inline void bmc_foad(void)
 
 /* end IPMI garbage */
 
+#include "arch/x86/lib/stages.c"
+
 static void main(unsigned long bist)
 {
        u8 b;
        u16 w;
        u32 l;
        int do_reset;
-       /*
-        * 
-        * 
-        */
+
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
-                       /*
-                       .f0 = PCI_DEV(0, 0x00, 0),
-                       .f1 = PCI_DEV(0, 0x00, 1),
-                       .f2 = PCI_DEV(0, 0x00, 2),
-                       .f3 = PCI_DEV(0, 0x00, 3),
-                       */
                        /* the wiring on this part is really messed up */
                        /* this is my best guess so far */
-                       .channel0 = {(0xa<<3)|0, (0xa<<3)|1, (0xa<<3)|2, (0xa<<3)|3, },
-                       .channel1 = {(0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, (0xa<<3)|7, },
+                       .channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, },
+                       .channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, },
                }
        };
 
@@ -194,9 +172,9 @@ static void main(unsigned long bist)
                0,
        };
 
-       /* using SerialICE, we've seen this basic reset sequence on the dell. 
+       /* using SerialICE, we've seen this basic reset sequence on the dell.
         * we don't understand it as it uses undocumented registers, but
-        * we're going to clone it. 
+        * we're going to clone it.
         */
        /* enable a hidden device. */
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
@@ -219,11 +197,11 @@ static void main(unsigned long bist)
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
        b &= ~0x8;
        pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-       
+
        /* set up LPC bridge bits, some of which reply on undocumented
         * registers
         */
-       
+
        b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd8);
        b |= 4;
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, b);
@@ -246,9 +224,9 @@ static void main(unsigned long bist)
        w = inw(0x866);
        outw(w|2, 0x866);
 
-#if 0 
+#if 0
        /*seriaice shows
-       dell does this so leave it here so I don't forget 
+       dell does this so leave it here so I don't forget
         */
        /* SMBUS */
        pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);
@@ -262,7 +240,7 @@ static void main(unsigned long bist)
        b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
        b |= 2;
        pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-       
+
        /* ?? */
        l = pci_read_config32(PCI_DEV(0, 8, 0), 0xc0);
        do_reset = l & 0x8000000;
@@ -276,9 +254,8 @@ static void main(unsigned long bist)
        if (bist == 0) {
                /* Skip this if there was a built in self test failure */
                early_mtrr_init();
-               if (memory_initialized()) {
-                       asm volatile ("jmp __cpu_reset");
-               }
+               if (memory_initialized())
+                       skip_romstage();
        }
        /* Setup the console */
        mainboard_set_ich5();
@@ -327,17 +304,15 @@ static void main(unsigned long bist)
 #if 0
 //     dump_spd_registers(&cpu[0]);
        int i;
-       for(i = 0; i < 1; i++) {
+       for(i = 0; i < 1; i++)
                dump_spd_registers();
-       }
 #endif
 #if 1
        show_dram_slots();
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
-       mainboard_set_e7520_leds();     
-//     memreset_setup();
+       mainboard_set_e7520_leds();
 
        sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
@@ -347,24 +322,4 @@ static void main(unsigned long bist)
        dump_pci_device(PCI_DEV(0, 0x00, 0));
 //     dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
-
-#if 1 // temporarily disabled 
-       /* Check the first 1M */
-//     ram_check(0x00000000, 0x000100000);
-//     ram_check(0x00000000, 0x000a0000);
-//     ram_check(0x00100000, 0x01000000);
-       ram_check(0x00100000, 0x00100100);
-       /* check the first 1M in the 3rd Gig */
-//     ram_check(0x30100000, 0x31000000);
-#endif
-#if 0
-       ram_check(0x00000000, 0x02000000);
-#endif
-       
-#if 0  
-       while(1) {
-               hlt();
-       }
-#endif
 }
-