1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUM...

[coreboot.git] / src / mainboard / asus / m2v / romstage.c

diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index d56ca9ce11f062f6f2647f7c7f7078d4883f42dd..4c86f55657552a336a944d8d7ffd1dfb86c631d1 100644 (file)
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -64,7 +64,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-// defines S3_NVRAM_EARLY:
 #include "southbridge/via/k8t890/k8t890_early_car.c"
 #include "northbridge/amd/amdk8/amdk8.h"
 #include "northbridge/amd/amdk8/incoherent_ht.c"