Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / asrock / 939a785gmh / romstage.c

diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 0bf20b654455409f91027fb28d1f2e70568845c8..6ab8c83156914bbd7e93d1ca6e1bc249f036ad5d 100644 (file)
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -52,17 +52,9 @@
 #define GPIO6_DEV PNP_DEV(0x2e, W83627DHG_GPIO6)
 #define GPIO2345_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345)
 
-/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-}
-
-/* called in raminit_f.c */
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-}
+static void memreset(int controllers, const struct mem_controller *ctrl) { }
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
 
-/*called in raminit_f.c */
 static inline int spd_read_byte(u32 device, u32 address)
 {
        return smbus_read_byte(device, address);
@@ -140,14 +132,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                /* Nothing special needs to be done to find bus 0 */
                /* Allow the HT devices to be found */
                enumerate_ht_chain();
-
                /* sb700_lpc_port80(); */
                sb700_pci_port80();
        }
 
-       if (bist == 0) {
+       if (bist == 0)
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
-       }
 
        enable_rs780_dev8();
        sb700_lpc_init();
@@ -187,8 +177,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        /* Check to see if processor is capable of changing FIDVID  */
        /* otherwise it will throw a GP# when reading FIDVID_STATUS */
        cpuid1 = cpuid(0x80000007);
-       if( (cpuid1.edx & 0x6) == 0x6 ) {
-
+       if ((cpuid1.edx & 0x6) == 0x6) {
                /* Read FIDVID_STATUS */
                msr=rdmsr(0xc0010042);
                printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
@@ -200,7 +189,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                /* show final fid and vid */
                msr=rdmsr(0xc0010042);
                printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
-
        } else {
                printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
        }