Unify Local APIC address definitions

[coreboot.git] / src / mainboard / amd / torpedo / mptable.c

diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c
old mode 100755 (executable)
new mode 100644 (file)
index 755b4a3..936a417
--- a/src/mainboard/amd/torpedo/mptable.c
+++ b/src/mainboard/amd/torpedo/mptable.c
@@ -26,6 +26,8 @@
 #include <stdint.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
+#include <cpu/amd/amdfam12.h>
+#include "SbPlatform.h"
 
 //-#define IO_APIC_ID    CONFIG_MAX_PHYSICAL_CPUS + 1
 #define IO_APIC_ID    CONFIG_MAX_CPUS
@@ -37,15 +39,15 @@ extern u32 sbdn_sb900;
 u32 apicid_sb900;
 
 u8 picr_data[] = {
-  0x0B,0x0B,0x0B,0x0B,0x1F,0x1F,0x1F,0x1F,0xFA,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, 
-  0x09,0x1F,0x1F,0x0B,0x1F,0x0B,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 
+  0x0B,0x0B,0x0B,0x0B,0x1F,0x1F,0x1F,0x1F,0xFA,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
+  0x09,0x1F,0x1F,0x0B,0x1F,0x0B,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
   0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
   0x0B,0x0B,0x0B,0x0B,0x0B,0x0B,0x0B,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
   0x0B,0x0B,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
   0x0B,0x0B,0x0B,0x0B
 };
 u8 intr_data[] = {
-  0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F, 
+  0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
   0x09,0x1F,0x1F,0x10,0x1F,0x12,0x1F,0x10,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
   0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
   0x12,0x11,0x12,0x11,0x12,0x11,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -82,7 +84,7 @@ static void *smp_write_config_table(void *v)
 
   mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
 
-  mptable_init(mc, LAPIC_ADDR);
+  mptable_init(mc, LOCAL_APIC_ADDR);
   memcpy(mc->mpc_oem, "AMD     ", 8);
 
   /*Inagua used dure core cpu with one die */
@@ -96,7 +98,7 @@ static void *smp_write_config_table(void *v)
       0, apic_version,
       cpu_flag, cpu_features, cpu_feature_flags
     );
-  
+
   cpu_flag = MPC_CPU_ENABLED;
   smp_write_processor(mc,
       1, apic_version,
@@ -112,28 +114,24 @@ static void *smp_write_config_table(void *v)
   my_smp_write_bus(mc, bus_isa, "ISA   ");
 
   /* I/O APICs:   APIC ID Version State   Address */
-  
-  device_t dev;
+
   u32 dword;
   u8 byte;
-    
-  dword = 0;
-  dword = pm_ioread(0x34) & 0xF0;
-  dword |= (pm_ioread(0x35) & 0xFF) << 8;
-  dword |= (pm_ioread(0x36) & 0xFF) << 16;
-  dword |= (pm_ioread(0x37) & 0xFF) << 24;
+
+       ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
+       dword &= 0xFFFFFFF0;
   /* Set IO APIC ID onto IO_APIC_ID */
   write32 (dword, 0x00);
   write32 (dword + 0x10, IO_APIC_ID << 24);
   apicid_sb900 = IO_APIC_ID;
   smp_write_ioapic(mc, apicid_sb900, 0x21, dword);
-  
+
   /* PIC IRQ routine */
   for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
     outb(byte, 0xC00);
     outb(picr_data[byte], 0xC01);
   }
-  
+
   /* APIC IRQ routine */
   for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
     outb(byte | 0x80, 0xC00);
@@ -166,21 +164,25 @@ static void *smp_write_config_table(void *v)
   /* PCI interrupts are level triggered, and are
    * associated with a specific bus/device/function tuple.
    */
+#if CONFIG_GENERATE_ACPI_TABLES == 0
 #define PCI_INT(bus, dev, int_sign, pin) \
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_sb900, (pin))
+#else
+#define PCI_INT(bus, dev, fn, pin)
+#endif
 
   /* Internal VGA */
   PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]);
   PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]);
-  
+
   /* SMBUS */
   PCI_INT(0x0, 0x14, 0x0, 0x10);
-  
+
   /* HD Audio */
   PCI_INT(0x0, 0x14, 0x0, intr_data[0x13]);
-  
+
   /* USB */
-  PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); 
+  PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]);
   PCI_INT(0x0, 0x12, 0x1, intr_data[0x31]);
   PCI_INT(0x0, 0x13, 0x0, intr_data[0x32]);
   PCI_INT(0x0, 0x13, 0x1, intr_data[0x33]);
@@ -194,7 +196,7 @@ static void *smp_write_config_table(void *v)
 
 
   /* on board NIC & Slot PCIE.  */
-  
+
   /* PCI slots */
   /* PCI_SLOT 0. */
   PCI_INT(bus_sb900[1], 0x5, 0x0, 0x14);
@@ -214,9 +216,9 @@ static void *smp_write_config_table(void *v)
   PCI_INT(bus_sb900[1], 0x7, 0x2, 0x14);
   PCI_INT(bus_sb900[1], 0x7, 0x3, 0x15);
 
-  PCI_INT(bus_sb900[2], 0x0, 0x0, 0x12);
-  PCI_INT(bus_sb900[2], 0x0, 0x1, 0x13);
-  PCI_INT(bus_sb900[2], 0x0, 0x2, 0x14);
+  PCI_INT(bus_sb900[1], 0x0, 0x0, 0x12);
+  PCI_INT(bus_sb900[1], 0x0, 0x1, 0x13);
+  PCI_INT(bus_sb900[1], 0x0, 0x2, 0x14);
 
   /* PCIe Lan*/
   PCI_INT(0x0, 0x06, 0x0, 0x13);
@@ -236,17 +238,12 @@ static void *smp_write_config_table(void *v)
   /* There is no extension information... */
 
   /* Compute the checksums */
-  mc->mpe_checksum =
-      smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
-  mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-  printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
-         mc, smp_next_mpe_entry(mc));
-  return smp_next_mpe_entry(mc);
+  return mptable_finalize(mc);
 }
 
 unsigned long write_smp_table(unsigned long addr)
 {
   void *v;
-  v = smp_write_floating_table(addr);
+  v = smp_write_floating_table(addr, 0);
   return (unsigned long)smp_write_config_table(v);
 }