return r;
}
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
{
/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
* component Banks (byte 17) * module banks, side (byte 5) *
msr = rdmsr(0x20000019);
msr.hi = 0x18000108;
msr.lo = 0x696332a3;
- wrmsr(0x20000019, msr);
+ wrmsr(0x20000019, msr);
}
};
SystemPreInit();
-
+
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
uart_init();
cpuRegInit();
print_err("done cpuRegInit\n");
-
+
sdram_initialize(1, memctrl);
msr_init();