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Some more DIMM0 related cleanups and deduplication.
[coreboot.git]
/
src
/
mainboard
/
amd
/
mahogany_fam10
/
romstage.c
diff --git
a/src/mainboard/amd/mahogany_fam10/romstage.c
b/src/mainboard/amd/mahogany_fam10/romstage.c
index abb2a114f8e5028fb70f4f647a83576f8d4d6cfb..5b062d61fffab7ff03b42e251f0b3c5775bd0deb 100644
(file)
--- a/
src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/
src/mainboard/amd/mahogany_fam10/romstage.c
@@
-86,11
+86,6
@@
static int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdfam10/early_ht.c"
#include "southbridge/amd/sb700/sb700_early_setup.c"
-//#include "spd_addr.h"
-
-#define RC00 0
-#define RC01 1
-
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{