After this has been brought up many times before, rename src/arch/i386 to

[coreboot.git] / src / mainboard / amd / mahogany / dsdt.asl

diff --git a/src/mainboard/amd/mahogany/dsdt.asl b/src/mainboard/amd/mahogany/dsdt.asl
index bb24e42016ac0f88410f61e3ad39ff0fc6d3e405..33c46204c23bd92c43ddc8b03563f39acb4f4167 100644 (file)
--- a/src/mainboard/amd/mahogany/dsdt.asl
+++ b/src/mainboard/amd/mahogany/dsdt.asl
@@ -27,7 +27,7 @@ DefinitionBlock (
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "acpi/debug.asl" */         /* Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -270,7 +270,7 @@ DefinitionBlock (
                        /* Byte offsets are computed using the following technique:
                         * ((bus number + 1) * ((device number * 8) * 4096)) + register offset
                         * The 8 comes from 8 functions per device, and 4096 bytes per function config space
-                       */
+                        */
                        Offset(0x00088024),     /* Byte offset to SATA register 24h - Bus 0, Device 17, Function 0 */
                        STB5, 32,
                        Offset(0x00098042),     /* Byte offset to OHCI0 register 42h - Bus 0, Device 19, Function 0 */
@@ -1120,13 +1120,13 @@ DefinitionBlock (
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */
                Device(PCI0) {
                        External (TOM1)
-                       External (TOM2)
+                       External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */
                        Name(_HID, EISAID("PNP0A03"))
                        Name(_ADR, 0x00180000)  /* Dev# = BSP Dev#, Func# = 0 */
                        Method(_BBN, 0) { /* Bus number = 0 */
@@ -1324,7 +1324,7 @@ DefinitionBlock (
 
                                /* Real Time Clock Device */
                                Device(RTC0) {
-                                       Name(_HID, EISAID("PNP0B01"))   /* AT Real Time Clock */
+                                       Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
                                        Name(_CRS, ResourceTemplate() {
                                                IRQNoFlags(){8}
                                                IO(Decode16,0x0070, 0x0070, 0, 2)
@@ -1364,10 +1364,10 @@ DefinitionBlock (
                                        Name(_CRS, ResourceTemplate() {
                                                DMA(Compatibility,BusMaster,Transfer8){4}
                                                IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
-                                               IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
-                                               IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
-                                               IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
-                                               IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+                                               IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+                                               IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+                                               IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+                                               IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
                                                IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
                                        }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
                                } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1517,29 +1517,29 @@ DefinitionBlock (
                                        0x00000000,             /* Min */
                                        0x00000000,             /* Max */
                                        0x00000000,             /* Translation */
-                                       0x00000000,             /* Max-Min, RLEN */
+                                       0x00000001,             /* Max-Min, RLEN */
                                        ,,
                                        PCBM
                                )
 
                                /* DRAM memory from 4GB to TopMem2 */
                                QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
-                                       0xFFFFFFFF,             /* Granularity */
-                                       0x00000000,             /*  Min */
+                                       0x00000000,             /* Granularity */
+                                       0x00000000,             /* Min */
                                        0x00000000,             /* Max */
                                        0x00000000,             /* Translation */
-                                       0x00000000,             /* Max-Min, RLEN */
+                                       0x00000001,             /* Max-Min, RLEN */
                                        ,,
                                        DMHI
                                )
 
                                /* BIOS space just below 16EB */
                                QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
-                                       0xFFFFFFFF,             /* Granularity */
+                                       0x00000000,             /* Granularity */
                                        0x00000000,             /* Min */
-                                       0x00000000,             /*  Max */
+                                       0x00000000,             /* Max */
                                        0x00000000,             /* Translation */
-                                       0x00000000,             /* Max-Min, RLEN */
+                                       0x00000001,             /* Max-Min, RLEN */
                                        ,,
                                        PEBM
                                )
@@ -1572,7 +1572,8 @@ DefinitionBlock (
                                /*
                                * If(LNotEqual(TOM2, 0x00000000)){
                                *       Store(0x100000000,DMHB)                 DRAM from 4GB to TopMem2
-                               *       Subtract(TOM2, 0x100000000, DMHL)
+                               *       ShiftLeft(TOM2, 20, Local0)
+                               *       Subtract(Local0, 0x100000000, DMHL)
                                * }
                                */