Intel cpus: cache actual size of the Flash ROM device

[coreboot.git] / src / mainboard / Kconfig

diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index a968b51563be44eb699489c91e13334092796b55..051ae45dff364e654305de0e583900e2232d1e6c 100644 (file)
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -301,6 +301,10 @@ config ROM_SIZE
        default 0x800000 if COREBOOT_ROMSIZE_KB_8192
        default 0x1000000 if COREBOOT_ROMSIZE_KB_16384
 
+config CACHE_ROM_SIZE
+       hex
+       default ROM_SIZE
+
 config ENABLE_POWER_BUTTON
        bool "Enable the power button" if POWER_BUTTON_IS_OPTIONAL
        default y if POWER_BUTTON_DEFAULT_ENABLE