Detect whether the OXPCIE card is really present while in the ROM stage.

[coreboot.git] / src / include / uart8250.h

diff --git a/src/include/uart8250.h b/src/include/uart8250.h
index 217558a8d50e1fc782d0c69d6f13ceeb9254b126..71b9a5f3109b232abcaa5b9248aea4804b247990 100644 (file)
--- a/src/include/uart8250.h
+++ b/src/include/uart8250.h
@@ -20,26 +20,7 @@
 #ifndef UART8250_H
 #define UART8250_H
 
-/* Base Address */
-#ifndef CONFIG_TTYS0_BASE
-#define CONFIG_TTYS0_BASE 0x3f8
-#endif
-
-#ifndef CONFIG_TTYS0_BAUD
-#define CONFIG_TTYS0_BAUD 115200
-#endif
-#if ((115200%CONFIG_TTYS0_BAUD) != 0)
-#error Bad ttys0 baud rate
-#endif
-
-/* Line Control Settings */
-#ifndef CONFIG_TTYS0_LCS
-/* Set 8bit, 1 stop bit, no parity */
-#define CONFIG_TTYS0_LCS       0x3
-#endif
-
-#define UART_LCS       CONFIG_TTYS0_LCS
-
+#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
 
 /* Data */
 #define UART_RBR 0x00
@@ -124,18 +105,46 @@
 #define   UART_MSR_DCTS                0x01 /* Delta CTS */
 
 #define UART_SCR 0x07
+#define UART_SPR 0x07
+
+#if ((115200 % CONFIG_TTYS0_BAUD) != 0)
+#error Bad ttyS0 baud rate
+#endif
 
+/* Line Control Settings */
+#define UART_LCS       CONFIG_TTYS0_LCS
 
 #ifndef __ROMCC__
 unsigned char uart8250_rx_byte(unsigned base_port);
 int uart8250_can_rx_byte(unsigned base_port);
 void uart8250_tx_byte(unsigned base_port, unsigned char data);
+void uart8250_tx_flush(unsigned base_port);
 
 /* Yes it is silly to have three different uart init functions. But we used to
  * have three different sets of uart code, so it's an improvement.
  */
 void uart8250_init(unsigned base_port, unsigned divisor);
 void uart_init(void);
+
+/* and the same for memory mapped uarts */
+unsigned char uart8250_mem_rx_byte(unsigned base_port);
+int uart8250_mem_can_rx_byte(unsigned base_port);
+void uart8250_mem_tx_byte(unsigned base_port, unsigned char data);
+void uart8250_mem_tx_flush(unsigned base_port);
+void uart8250_mem_init(unsigned base_port, unsigned divisor);
+u32 uart_mem_init(void);
+u32 uartmem_getbaseaddr(void);
+
+#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE && \
+       CONFIG_CONSOLE_SERIAL8250MEM
+/* and special init for OXPCIe based cards */
+extern int oxford_oxpcie_present;
+
+void oxford_init(void);
 #endif
 
+#endif /* __ROMCC__ */
+
+#endif /* CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM */
+
 #endif /* UART8250_H */