Add support for enabling PCIe Common Clock and ASPM

[coreboot.git] / src / include / device / pciexp.h

diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
index 409f211a82f6ecd3b46b6f943b5a0bbba12e317b..87a5002c5ead9f3a83ae0c350357cc79966c1885 100644 (file)
--- a/src/include/device/pciexp.h
+++ b/src/include/device/pciexp.h
@@ -2,6 +2,13 @@
 #define DEVICE_PCIEXP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
+enum aspm_type {
+       PCIE_ASPM_NONE = 0,
+       PCIE_ASPM_L0S  = 1,
+       PCIE_ASPM_L1   = 2,
+       PCIE_ASPM_BOTH = 3,
+};
+
 unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
                             unsigned int max_devfn, unsigned int max);
 unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);