Fill out ChromeOS specific coreboot table extensions

[coreboot.git] / src / include / boot / coreboot_tables.h

diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index 983b03f602f364701b9ffdb5b45bfc88bb591942..5d5ca2cf566dc76b24a7fafdc7f3ed9e8b2f8f99 100644 (file)
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -146,7 +146,10 @@ struct lb_string {
 struct lb_serial {
        uint32_t tag;
        uint32_t size;
-       uint16_t ioport;
+#define LB_SERIAL_TYPE_IO_MAPPED     1
+#define LB_SERIAL_TYPE_MEMORY_MAPPED 2
+       uint32_t type;
+       uint32_t baseaddr;
        uint32_t baud;
 };
 
@@ -192,6 +195,52 @@ struct lb_framebuffer {
        uint8_t reserved_mask_size;
 };
 
+#define LB_TAG_GPIO    0x0013
+
+struct lb_gpio {
+       uint32_t port;
+       uint32_t polarity;
+       uint32_t value;
+#define GPIO_MAX_NAME_LENGTH 16
+        uint8_t name[GPIO_MAX_NAME_LENGTH];
+};
+
+struct lb_gpios {
+       uint32_t tag;
+       uint32_t size;
+
+       uint32_t count;
+       struct lb_gpio gpios[0];
+};
+
+#define LB_TAG_VDAT    0x0015
+struct lb_vdat {
+       uint32_t tag;
+       uint32_t size;
+
+       void    *vdat_addr;
+       uint32_t vdat_size;
+};
+
+#define LB_TAG_TIMESTAMPS      0x0016
+#define LB_TAG_CBMEM_CONSOLE   0x0017
+#define LB_TAG_MRC_CACHE       0x0018
+struct lb_cbmem_ref {
+       uint32_t tag;
+       uint32_t size;
+
+       void    *cbmem_addr;
+};
+
+#define LB_TAG_VBNV            0x0019
+struct lb_vbnv {
+       uint32_t tag;
+       uint32_t size;
+
+       uint32_t vbnv_start;
+       uint32_t vbnv_size;
+};
+
 /* The following structures are for the cmos definitions table */
 #define LB_TAG_CMOS_OPTION_TABLE 200
 /* cmos header record */