Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / cpu / amd / socket_ASB2 / Kconfig

diff --git a/src/cpu/amd/socket_ASB2/Kconfig b/src/cpu/amd/socket_ASB2/Kconfig
index 7b8857f3a4af3670c7199f13223e1095e4b9acc9..964a59f7062820c10495fd3a1b0a31702432602f 100644 (file)
--- a/src/cpu/amd/socket_ASB2/Kconfig
+++ b/src/cpu/amd/socket_ASB2/Kconfig
@@ -3,6 +3,7 @@ config CPU_AMD_SOCKET_ASB2
        select CPU_AMD_MODEL_10XXX
        select HT3_SUPPORT
        select PCI_IO_CFG_EXT
+       select CACHE_AS_RAM
 
 config CPU_SOCKET_TYPE
        hex