remove trailing whitespace

[coreboot.git] / src / cpu / amd / model_lx / msrinit.c

diff --git a/src/cpu/amd/model_lx/msrinit.c b/src/cpu/amd/model_lx/msrinit.c
index 6569338a2f63ee7ff7885fdc5d975323e42c35ad..9c6e98e14c598cd682e274c733cacce143bd3556 100644 (file)
--- a/src/cpu/amd/model_lx/msrinit.c
+++ b/src/cpu/amd/model_lx/msrinit.c
@@ -45,7 +45,7 @@ static const msrinit_t msr_table[] =
         * of this extended memory will be to host the coreboot_ram stage at RAMBASE,
         * currently 1Mb.
         * These registers will be set to their correct value by the Northbridge init code.
-        * 
+        *
         * WARNING: if coreboot_ram could not be loaded, these registers are probably
         * incorrectly set here. You may comment the following two lines and set RAMBASE
         * to 0x4000 to revert to the previous behavior for LX-boards.