Update the FAM10 microcode to current versions.

[coreboot.git] / src / cpu / amd / model_10xxx / init_cpus.c

diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index 5c17a9a118b1baff5ab49e363d60d9cd4aa329f6..16b5a3d928b3e2036060254a804e6886d8ad6f91 100644 (file)
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -53,6 +53,7 @@ static inline void print_initcpu(const char *strval, u32 val)
 }
 
 
+void update_microcode(u32 cpu_deviceid);
 static void prep_fid_change(void);
 static void init_fidvid_stage2(u32 apicid, u32 nodeid);
 void cpuSetAMDMSR(void);
@@ -391,6 +392,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
                 * This happens after HTinit.
                 * The BSP runs this code in it's own path.
                 */
+               update_microcode(cpuid_eax(1));
                cpuSetAMDMSR();