* rework tsc based timer code to use inb instead of outb for calibration

[coreboot.git] / src / config / Options.lb

diff --git a/src/config/Options.lb b/src/config/Options.lb
index 76d0d9291542e19d20f2076b6bfd23bce11dd159..5055ac4abdf18faec223055e3afde8ed728bb43e 100644 (file)
--- a/src/config/Options.lb
+++ b/src/config/Options.lb
@@ -928,6 +928,11 @@ define CONFIG_UDELAY_IO
        export used
        comment "Implement udelay with x86 io registers"
 end
+define CONFIG_UDELAY_LAPIC
+       default 0
+       export used
+       comment "Implement udelay with the x86 Local APIC"
+end
 define CONFIG_FAKE_SPDROM
        default 0
        export always