Add more timestamps in coreboot.
[coreboot.git] / src / boot / hardwaremain.c
index f56069effd17d5bc56383c0c5f89bacbb63423ab..489caa39a594ae5e5293bad06b7704a65e8b197a 100644 (file)
@@ -31,8 +31,7 @@ it with the version available from LANL.
 #include <device/pci.h>
 #include <delay.h>
 #include <stdlib.h>
-#include <part/hard_reset.h>
-#include <part/init_timer.h>
+#include <reset.h>
 #include <boot/tables.h>
 #include <boot/elf.h>
 #include <cbfs.h>
@@ -42,14 +41,15 @@ it with the version available from LANL.
 #if CONFIG_WRITE_HIGH_TABLES
 #include <cbmem.h>
 #endif
+#include <timestamp.h>
 
 /**
  * @brief Main function of the RAM part of coreboot.
  *
- * Coreboot is divided into Pre-RAM part and RAM part. 
- * 
+ * Coreboot is divided into Pre-RAM part and RAM part.
+ *
  * Device Enumeration:
- *     In the dev_enumerate() phase, 
+ *     In the dev_enumerate() phase,
  */
 
 void hardwaremain(int boot_complete);
@@ -57,19 +57,21 @@ void hardwaremain(int boot_complete);
 void hardwaremain(int boot_complete)
 {
        struct lb_memory *lb_mem;
+       tsc_t timestamps[6];
 
-       post_code(0x80);
+       timestamps[0] = rdtsc();
+       post_code(POST_ENTRY_RAMSTAGE);
 
        /* console_init() MUST PRECEDE ALL printk()! */
        console_init();
-       
-       post_code(0x39);
 
-       printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", 
+       post_code(POST_CONSOLE_READY);
+
+       printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
                      coreboot_version, coreboot_extra_version, coreboot_build,
                      (boot_complete)?"rebooting":"booting");
 
-       post_code(0x40);
+       post_code(POST_CONSOLE_BOOT_MSG);
 
        /* If we have already booted attempt a hard reboot */
        if (boot_complete) {
@@ -77,37 +79,54 @@ void hardwaremain(int boot_complete)
        }
 
        /* FIXME: Is there a better way to handle this? */
-       init_timer(); 
+       init_timer();
 
+       timestamps[1] = rdtsc();
        /* Find the devices we don't have hard coded knowledge about. */
        dev_enumerate();
-       post_code(0x66);
+       post_code(POST_DEVICE_ENUMERATION_COMPLETE);
+
+       timestamps[2] = rdtsc();
        /* Now compute and assign the bus resources. */
        dev_configure();
-       post_code(0x88);
+       post_code(POST_DEVICE_CONFIGURATION_COMPLETE);
+
+       timestamps[3] = rdtsc();
        /* Now actually enable devices on the bus */
        dev_enable();
+
+       timestamps[4] = rdtsc();
        /* And of course initialize devices on the bus */
        dev_initialize();
-       post_code(0x89);
+       post_code(POST_DEVICES_ENABLED);
 
+       timestamps[5] = rdtsc();
 #if CONFIG_WRITE_HIGH_TABLES == 1
        cbmem_initialize();
+#if CONFIG_CONSOLE_CBMEM
+       cbmemc_reinit();
+#endif
 #endif
 #if CONFIG_HAVE_ACPI_RESUME == 1
        suspend_resume();
        post_code(0x8a);
 #endif
 
+       timestamp_add(TS_START_RAMSTAGE, timestamps[0]);
+       timestamp_add(TS_DEVICE_ENUMERATE, timestamps[1]);
+       timestamp_add(TS_DEVICE_CONFIGURE, timestamps[2]);
+       timestamp_add(TS_DEVICE_ENABLE, timestamps[3]);
+       timestamp_add(TS_DEVICE_INITIALIZE, timestamps[4]);
+       timestamp_add(TS_DEVICE_DONE, timestamps[5]);
+       timestamp_add_now(TS_WRITE_TABLES);
+
        /* Now that we have collected all of our information
         * write our configuration tables.
         */
        lb_mem = write_tables();
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-       cbfs_load_payload(lb_mem, "fallback/payload");
-#else
-       cbfs_load_payload(lb_mem, "normal/payload");
-#endif
+
+       timestamp_add_now(TS_LOAD_PAYLOAD);
+       cbfs_load_payload(lb_mem, CONFIG_CBFS_PREFIX "/payload");
        printk(BIOS_ERR, "Boot failed.\n");
 }