Add support for RAM-less multi-processor init

[coreboot.git] / src / arch / x86 / init / ldscript_failover.lb

diff --git a/src/arch/x86/init/ldscript_failover.lb b/src/arch/x86/init/ldscript_failover.lb
index 7e48dc1a256eedbe2f81248baee2cef0d052f768..61c3d2a35ba33917dec4ca41e585c537fde4c5ce 100644 (file)
--- a/src/arch/x86/init/ldscript_failover.lb
+++ b/src/arch/x86/init/ldscript_failover.lb
@@ -29,9 +29,18 @@ MEMORY {
 TARGET(binary)
 SECTIONS
 {
+       /* Symbol ap_sipi_vector must be aligned to 4kB to start AP CPUs
+        * with Startup IPI message without RAM.
+        */
+       .bogus ROMLOC_MIN : {
+               . = ALIGN(4096);
+               ROMLOC = .;
+       } >rom = 0xff
+
        /* This section might be better named .setup */
        .rom ROMLOC : {
                _rom = .;
+               ap_sipi_vector = .;
                *(.rom.text);
                *(.rom.data);
                *(.rom.data.*);
@@ -39,7 +48,15 @@ SECTIONS
                _erom = .;
        } >rom = 0xff
 
-       ROMLOC = 0xffffff00 - (_erom - _rom) + 1;
+       /* Allocation reserves extra 16 bytes here. Alignment requirements
+        * may cause the total size of a section to change when the start
+        * address gets applied.
+        */
+       ROMLOC_MIN = 0xffffff00 - (_erom - _rom + 16) - 4096;
+
+       /* Post-check proper SIPI vector. */
+       _bogus = ASSERT(((ap_sipi_vector & 0x0fff) == 0x0), "Bad SIPI vector alignment");
+       _bogus = ASSERT((ap_sipi_vector == CONFIG_AP_SIPI_VECTOR), "Address mismatch on AP_SIPI_VECTOR");
 
        /DISCARD/ : {
                *(.comment)